October 21, 2016
Partition design between multiple Xilinx FPGAs
In this video, System View’s Founder and CEO, Sandeep Dutta uses Visual System Integrator to partition a design to be spread across multiple Xilinx FPGAs.
October 14, 2016
Do packet processing at line speed (10GBps) on a Virtex 7 FPGA
In this video, System View’s Founder and CEO, Sandeep Dutta uses Visual System Integrator for network packet processing at line speed. He effortlessly creates a Virtex 7 based platform, import C/C++ code for deep packet inspection and use Visual System Integrator to synthesize it for the FPGA.
October 07, 2016
Accelerate your software with a Zynq FPGA
In this video, System View’s Founder and CEO, Sandeep Dutta shows you how to use Visual System Integrator to create a Zynq based platform, import your C / C++ code and use Visual System Integrator to synthesize it for the FPGA for acceleration
