Do packet processing at line speed (10GBps) on a Virtex 7 FPGA

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In this video, System View’s Founder and CEO, Sandeep Dutta uses Visual System Integrator for network packet processing at line speed. He effortlessly creates a Virtex 7 based platform, import C/C++ code for deep packet inspection and use Visual System Integrator to synthesize it for the FPGA.

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